ECEN 5223
Links for ECEN 5223 spring 2008
Paper and Presentation Requirements.
Paper selection instructions.
Simple example for Stuck-At Fault coverage
Simple example for LFSR implementing Polynomial Division
Diagram to implement Polynomial Coefficients for Type1 and Type 2 8-bit LFSRs
Schneider's Counter Example for Path Sensitization. This example demonstrates
the requirement for the d-algorithm.
Spring 2007 Deductive Fault Simulation Paper Review. This is a .ppt file.
Simple example implementation of a MiniALU
Another Simple example implementation of a MiniALU
Lecture notes on 8 bit Hamming Code (this is a .pdf file)
Logon to see online classroom
D2L online classroom Login page
Before you try to check your report, extra credit, or lab scores with the Automatic Grader, read
THIS OVERVIEW
and read
THIS login HELP page.
Automatic Grader
Sometimes the Automatic grader has problems that are fixed by
using the
Alternate Automatic Grader on server 4.
Xilinx ISE WebPACK Verilog Simulation software free downloads.
We will be using the Cadence Design tools, which are licensed and
installed at the Stillwater campus.
How to use the computer where the Simulator is running
Running the Logic CAD tools
The Standard Cell Library
LFSR type 1 with Constants
Fault Modelling Chapter (pdf file)
Accurate Bridging Fault Model Chapter (pdf file)
Grade Plots
Spring 2007 Exam 1 plot of scores
Exam solutions
Spring 2008 Exam 1 solution (.pdf )
Spring 2007 Exam 1 solution (.pdf )
[ECEN5223]
[Announcements]
[Schedule]
[Syllabus]
[Assignments]
Feel free to email comments and suggestions to
john.m.acken@okstate.edu
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