|
ECEN 4243 Spring 2003 Exam 1 19 February 2003 |
Name______Solution_____________ |
Read the instructions carefully before completing the exam. All answers must be shown on these pages – no attached pages will be graded. The Book referred to in this exam is the textbook for the class, specifically Computer Organization and Design by Patterson and Hennessy. This exam is open book, open notes.
- (6pts). Draw and label a diagram that shows the three major blocks and three busses that make up every digital computer.
2. (4pts) The book gives five basic blocks. Which of those five major blocks is exactly the same for the above diagram’s three major blocks?
Memory
_
3. (4pts) Which one of those three major blocks contains the general purpose registers?
CPU
_
4. (4pts) Which one of the five major blocks in the book contains the general purpose registers?
DataPath _
5.
(15pts) Complete the timing diagrams to show the response of a D Latch (high
level sensitive) and a Master-Slave D Flip-Flop (MS-D-FF, falling edge
triggered).
6. (15pts) Draw the logic gate implementation for a 4 to 5 decoder using only NAND gates and inverters. The truth table for the decoder is:
|
Inputs |
Outputs |
|
|||||||
|
x3 |
x2 |
x1 |
x0 |
Logic |
Sub |
Unary |
Ch1 |
Ch0 |
|
|
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
1 |
|
|
0 |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
1 |
|
|
0 |
0 |
1 |
0 |
X |
X |
X |
0 |
0 |
|
|
1 |
0 |
1 |
0 |
0 |
0 |
1 |
1 |
0 |
|
|
1 |
1 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
|
|
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
1 |
|
|
All other values |
X |
X |
X |
X |
X |
||||
7. (16 points) Draw a state diagram for The following LFSR. The initial state is 111. You should be sure to notice there are two inputs (x1 and x0, to be represented in your state diagram as x1x0). The State values in your diagram are to be represented s2s1s0. Hint: there are eight states with four edges for each state.