ECEN 4243

Spring 2002

Exam 1

22 February 2002

 

Name______Solution_________________

Read the instructions carefully before completing the exam.  All answers must be shown on these pages – no attached pages will be graded.  This exam is open book, open notes.

 

 

1. (12pts). Draw and label a diagram that shows the three major blocks and three busses that make up every digital computer.

 

 

 

 

 

 


2. (5pts) Which of those three major blocks contains the ALU? __CPU_______

3. (5pts) Which of those three major blocks contains the general purpose registers?CPU_

4. (5pts) What determines the number of bits in each of the three busses listed above?

Address bus is set by size of memory, # bit in Add bus = log base 2 of number of words in memory.

Data bus is set by number of bits in data word (e.g. size of Data Registers)

The number of bits in the control bus varies, as it is not fixed or global.

 

5. (15pts) Complete the timing diagrams to show the response of a D Latch and a Master-Slave D Flip-Flop (MS-D-FF).  State any assumptions, such as high-level sensitive or rising edge-triggered.

 

 

 

 

 

 


 

 

 

 

 

 

6. (15pts) Draw the logic gate implementation for a 2 to 3 decoder.  The truth table for the decoder is:

Inputs

Outputs

x1

x0

Line0

Line1

Line2

0

0

1

0

0

0

1

0

1

0

1

0

0

0

1

1

1

0

0

1

    

 

 

 

 

 

  7. (15 points) Draw a circuit that obeys the following timing diagram.

 

 

 

 

 

 

 

 

This is a NAND Gate.

 

 


 


8. (10 points) Draw a state diagram for a Master-Stave D Flip-Flop (MS-D-FF).

 

 

 

 

 

 

 


    

The following multiple-choice questions will be scored as 3 pts for each correct answer, -1 for an incorrect answer and 0 for unanswered questions.

  

9.  How many bits is the minimum required for an address space of 65,000 words? _C__

                a. 8      b. 15     c. 16     d. 17     e. 31    f. 32    g. None of these

 

10. How many general registers can be addressed by instructions with 12 bits for registers, with 4 bits for A source, 4 bits for B source, and 4 bits for destination? __D__

                a. 4      b. 8       c. 15        d. 16       e. 31    f. 32   g. None of these

 

    The following True / False questions are worth 2 points each.  Circle T for True or F for False for your answer. 

 

      F     11. All digital computers have a data bus that has more bits than the address bus.

      F      12. A full adder is twice as big as a half adder.

T            13. The carry bit out of the highest order bit is used to indicate an overflow.

T            14. Multiplexers have more inputs than outputs.

      F        15. Demultiplexers have more inputs than outputs.

     F        16. For a MS- D flip-flop, the hold time is always greater than the setup time.